Our lab pursues research on the
theory and applications of distributed information systems. We
currently focus on data storage in memories, especially
flash memories and phase-change memories.
Awards:
NSF (National Science Foundation) CAREER Award,
2008.
IEEE 2009 Best Paper Award in Signal Processing and Coding for Data
Storage, IEEE Communications Society. (IEEE
Information Theory Society Newsletter, page 4.)
Graduate Faculty Teaching Excellence
Award of the Computer Science and Engineering Department of Texas
A&M University, 2012-2013.
Tutorials:
"Signal Processing and Coding for Non-Volatile Memories," 3-hour Tutorial at Non-Volatile Memories Workshop (NVMW), presented with Jason Bellorado and Eitan Yaakobi, March 2013.
"Coding Methods for Emerging Storage Systems," 3-hour Tutorial at Asilomar Conference on Signals, Systems and Computers, presented with Lara Dolecek, November 2012.
Innovations:
Bit-fixing Codes
(for Multi-level Cells):
A. Jiang, Y. Li and J. Bruck, Correcting Errors in MLCs with Bit-fixing Coding, to appear in Proc. Non-Volatile Memories Workshiop (NVMW), San Diego, CA, March 2013.
A. Jiang, Y. Li and J. Bruck,
Bit-fixing Codes for Multi-level Cells, to appear in Proc.
IEEE Information Theory Workshop (ITW), Lausanne, Switzerland,
September 2012.
VLC: Variable Level
Cells (for Flash Memories, PCMs, Memristors and other
emerging Nonvolatile Memories):
A. Jiang, H. Zhou and J. Bruck,
Variable-level Cells for Nonvolatile Memories, in Proc. IEEE International Symposium on Information
Theory (ISIT), pp. 2489--2493, St. Petersburg, Russia, August 2011.
A. Jiang, H. Zhou and J. Bruck,
Maximizing the Storage Capacity of Nonvolatile Memories,
in Proc. Information Theory and Applications Workshop (ITA),
UCSD, San Diego, CA, Feb. 2011.
Patterned Cells
(for PCMs):
A. Jiang, H. Zhou, Z.Wang and J. Bruck,
Patterned Cells for Phase Change Memories, in Proc. IEEE International Symposium on Information
Theory (ISIT), pp. 2294--2298, St. Petersburg, Russia, August 2011.
Rank Modulation
(for Flash Memories, PCMs, Memristors and other emerging Nonvolatile
Memories):
E. En Gad, E. Yaakobi, A. Jiang and J. Bruck, Rank-Modulation Rewriting Codes for Flash Memories, to appear in Proc. IEEE International Symposium on Information Theory (ISIT), July 2013.
M. Qin, A. Jiang and P. H. Siegel, Parallel Programming of Rank Modulation, to appear in Proc. IEEE International Symposium on Information Theory (ISIT), July 2013.
Q. Li, Compressed Rank
Modulation, to appear in Proc. 50th
Annual Allerton Conference on Communication, Control and Computing
(Allerton'12), Monticello, IL, October 2012.
H. Zhou, A. Jiang and J. Bruck,
Systematic Error-correcting Codes for Rank
Modulation, to appear in Proc. IEEE International Symposium
on Information Theory (ISIT), Cambridge, MA, July 2012.
E. En Gad, A. Jiang and J. Bruck,
Trade-offs between Instantaneous and Total
Capacity in Multi-cell Flash Memories, to appear in Proc.
IEEE International Symposium on Information Theory (ISIT),
Cambridge, MA, July 2012.
E. En Gad, A. Jiang and J. Bruck,
Compressed Encoding for Rank Modulation, in Proc. IEEE International Symposium on Information
Theory (ISIT), pp. 849--853, St. Petersburg, Russia, August 2011.
A. Jiang and Y. Wang,
Rank
Modulation with Multiplicity, in
Proc. IEEE Workshop on Application of Communication Theory to Emerging
Memory Technologies (ACTEMT), pp. 1928--1932, Miami, FL, Dec. 2010.
F. Zhang, H. Pfister and A. Jiang,
LDPC Codes for Rank Modulation in Flash Memories,
in Proc. IEEE International Symposium on Information
Theory (ISIT), pp. 859--863, Austin, TX, June 2010.
A. Jiang and J. Bruck,
Data
Representation for Flash Memories, book chapter in
Data
Storage, ISBN 978-953-307-063-6, In-Tech Publisher, 2010.
A. Jiang, M. Schwartz and J. Bruck,
Correcting Charge-constrained Errors in The Rank
Modulation Scheme, in IEEE Transactions on
Information Theory, vol. 56, no. 5, pp. 2112-2120, May 2010.
Z. Wang, A. Jiang and J. Bruck,
On the Capacity of Bounded Rank Modulation for Flash Memories, in
Proc. IEEE International Symposium on Information Theory (ISIT),
pp. 1234--1238, Seoul, Korea,
June-July 2009.
A. Jiang, R. Mateescu, M. Schwartz and J. Bruck,
Rank Modulation for Flash Memories, in
IEEE Transactions on Information Theory, vol. 55, no. 6, pp.
2659-2673, June 2009. (2009 IEEE
Communications Society Best Paper Award in Signal Processing and
Coding for Data Storage.)
A. Jiang, R. Mateescu, M. Schwartz and J. Bruck,
Rank Modulation for Flash Memories, Proc. IEEE International Symposium on Information Theory
(ISIT), pp. 1731--1735, Toronto, Canada, July 2008.
A. Jiang, M. Schwartz and J. Bruck,
Error-Correcting Codes for Rank Modulation, Proc. IEEE International Symposium on Information
Theory (ISIT), pp. 1736--1740, Toronto, Canada, July 2008.
US patent No. 8,225,180,
"Error Correcting Codes for Rank Modulation," A. Jiang, M. Schwartz
and J. Bruck.
US patent No. 8,245,094, "Rank Modulation for Flash Memories," A. Jiang, R. Mateescu, M. Schwartz and J. Bruck.
Codes for Rewriting
Data (for Flash Memories and other emerging Nonvolatile
Memories):
A. Jiang, Y. Li, E. En Gad, M. Langberg and J. Bruck, Joint Rewriting and Error Correction in Write-Once Memories, to appear in Proc. IEEE International Symposium on Information Theory (ISIT), July 2013.
A. Jiang, M. Langberg, M. Schwartz and J. Bruck, Trajectory Codes for Flash Memory, to appear in IEEE Transactions on Information Theory, 2013.
A. Jiang, Y. Li, E. En Gad, M. Langberg and J. Bruck, Error Correcting Code for Flash Memories, to appear in Proc. Information Theory and Applications (ITA) Workshop, San Diego, CA, February 2013.
Q. Li,
WOM Codes against
Inter-cell Interference in NAND Memories, in Proc. 49th
Annual Allerton Conference on Communication, Control and Computing
(Allerton'11), pp. 1416-1423, Monticello, IL, September 2011.
Y. Wu and A. Jiang,
Position
Modulation Code for Rewriting Write-Once Memories, in IEEE
Transactions on Information Theory, vol. 57, no. 6, pp.
3692--3697, June 2011.
A. Jiang, V. Bohossian and J. Bruck,
Rewriting Codes for Joint Information Storage in
Flash Memories, in IEEE Transactions on
Information Theory, vol. 56, no. 10, pp. 5300-5313, October 2010.
A. Jiang and J. Bruck,
Information Representation and Coding for Flash Memories, in
Proc. IEEE Pacific Rim Conference on Communications, Computers and
Signal Processing (PACRIM), pp. 920--925, Victoria, B.C., Canada, August 2009.
A. Jiang, M. Langberg, M. Schwartz and J. Bruck,
Universal Rewriting in Constrained Memories, in
Proc. IEEE International Symposium on Information Theory (ISIT),
pp. 1219--1223, Seoul, Korea,
June-July 2009.
A. Jiang and J. Bruck, Joint
Coding for Flash Memory Storage, Proc. IEEE
International Symposium on Information Theory (ISIT), pp.
1741--1745, Toronto, Canada, July 2008.
V. Bohossian, A. Jiang and J. Bruck,
Buffer Coding for Asymmetric Multi-Level
Memory, Proc. IEEE International Symposium on Information
Theory (ISIT), pp. 1186--1190, Nice, France, June 2007.
A. Jiang, On The
Generalization of Error-Correcting WOM Codes,
Proc. IEEE International Symposium on Information Theory (ISIT),
pp. 1391--1395, Nice, France, June 2007.
A. Jiang, V. Bohossian and J. Bruck,
Floating Codes for Joint Information
Storage in Write Asymmetric Memories, Proc. IEEE
International Symposium on Information Theory (ISIT), pp.
1166--1170, Nice, France, June 2007.
US patent No. 7,656,706,
“Storing Information in a Memory,” A. Jiang, V. Bohossian and J.
Bruck.
Error Scrubbing Codes
(for Flash Memories):
A. Jiang, H. Li and Y. Wang,
Error Scrubbing Codes for Flash Memories, in Proc.
Canadian Workshop on Information Theory (CWIT), pp. 32--35,
Ottawa, Canada, May 2009.
Data Movement based on
Coding (for Flash Memories):
A. Jiang, R. Mateescu, E. Yaakobi, J. Bruck, P.
Siegel, A. Vardy and J. Wolf,
Storage Coding for
Wear Leveling in
Flash Memories, in IEEE Transactions on Information
Theory, vol. 56, no. 10, pp. 5290-5299, October 2010.
A. Jiang, M. Langberg, R. Mateescu and J. Bruck,
Data Movement and Aggregation in
Flash Memories, in Proc. IEEE International
Symposium on
Information Theory (ISIT), pp. 1918-1922, Austin, TX, June 2010.
A. Jiang, M. Langberg, R. Mateescu and J. Bruck,
Data Movement in Flash Memories, in Proc. 47th Annual Allerton Conference on Communication,
Control and Computing (Allerton'09), pp. 1031--1038, Monticello, IL, September
2009.
A. Jiang, R. Mateescu, E. Yaakobi, J. Bruck, P.
Siegel, A. Vardy and J. Wolf,
Storage Coding for
Wear Leveling in Flash Memories, in Proc. IEEE
International Symposium on Information Theory (ISIT), pp.
1229--1233, Seoul, Korea, June-July 2009.
Constrained Codes for
Phase Change Memories:
A. Jiang, J. Bruck and H. Li,
Constrained Codes for Phase-change Memories, in
Proc. IEEE Information
Theory Workshop (ITW), Dublin, Ireland, Aug.-Sep. 2010.
Other topics
(for Flash Memories):
E. Yaakobi, A. Jiang and J. Bruck, In-Memory Computing of Akers Logic Array, to appear in Proc. IEEE International Symposium on Information Theory (ISIT), July 2013.
H. Zhou, A. Jiang and J. Bruck, Nonuniform Codes for Correcting Asymmetric Errors in Data Storage, in IEEE Transactions on Information Theory, vol. 59, no. 5, pp. 2988--3002, May 2013.
M. Salajegheh, Y. Wang, A. Jiang, E. Learned-Miller
and K. Fu, Half-Wits: Software Techniques for
Low-voltage Probabilistic Storage on Microcontrollers with NOR Flash
Memory, to appear in ACM Transactions on Embedded Computing
Systems, Special Issue on Probabilistic Embedded Computing,
2013.
Y. Li, Y. Wang, A. Jiang and J. Bruck, Content-assisted File Decoding for Nonvolatile Memories, in Proc. 46th Asilomar Conference on Signals, Systems and Computers, pp. 937--941, Pacific Grove, CA, November 2012.A. Jiang, H. Li and J. Bruck,
On the Capacity and Programming of Flash Memories,
in
IEEE Transactions on Information Theory, vol. 58, no. 3, pp.
1549--1564, March 2012.
M. Salajegheh, Y. Wang, A. Jiang, E. Learned-Miller
and K. Fu, Half-Wits: Software Techniques for
Low-voltage Probabilistic Storage on Microcontrollers with NOR Flash
Memory, in Proc. 3rd Annual Non-Volatile Memories
Workshop (NVMW), UCSD, San Diego, CA, March
2012.
H. Zhou, A. Jiang and J. Bruck,
Nonuniform Codes for Correcting Asymmetric
Errors, in Proc. IEEE International Symposium on
Information Theory (ISIT), pp. 1011--1015, St. Petersburg, Russia, August 2011.
H. Zhou, A. Jiang and J. Bruck,
Error-correcting Schemes with Dynamic Thresholds
in Nonvolatile Memories, in Proc. IEEE
International Symposium on Information Theory (ISIT), pp.
2109--2113, St.
Petersburg, Russia, August 2011.
M. Salajegheh, Y. Wang, K. Fu, A. Jiang and E.
Learned-Miller,
Exploiting Half-Wits: Smarter
Storage for Low-Power Devices, in Proc. 9th USENIX
Conference on File and Storage Technologies (FAST), San Jose, CA,
Feb. 2011.
E. Yaakobi, A. Jiang, P. Siegel, A. Vardy and J.
Wolf, On the Parallel Programming of Flash Memories
Cells, in Proc. IEEE Information
Theory Workshop (ITW), Dublin, Ireland, Aug.-Sep. 2010.
A. Jiang and H. Li,
Optimized
Cell Programming for Flash Memories, in
Proc. IEEE Pacific Rim Conference on Communications, Computers and
Signal Processing (PACRIM), pp. 914--919, Victoria, B.C., Canada, August 2009.
A. Jiang and J. Bruck, On The
Capacity of Flash Memories, in Proc. International
Symposium on Information Theory and Its Applications (ISITA), pp.
94--99, Auckland, New Zealand,
December 2008.
